Artigos, DISSERTAÇÕES DE MESTRADO E TESES DE DOUTORADO

Abaixo você pode acessar alguns dos meus últimos artigos públicados. Veja uma lista completa no Curriculum Lattes  ou os mais importantes reportados pelo dblp.

2021

  • SANTOS, PAULO C.; LIMA, J. P. C.; DE MOURA, RAFAEL F.; ALVES, M. A. Z.; BECK, ANTONIO C. S.; CARRO, LUIGI. Enabling Near-Data Accelerators Adoption by Through Investigation of Datapath Solutions, Int. Journal Of Parallel Programming (IJPP), v. 49, p. 1-16, 2021. (Journal) [DOI] [PDF]
  • CORDEIRO, ALINE S.; SANTOS, SAIRO R.; MOREIRA, FRANCIS B.; SANTOS, PAULO C.; CARRO, LUIGI; ALVES, MARCO A. Z. Machine Learning Migration for Efficient Near-Data Processing In: 29th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), 2021, Valladolid, Spain.[DOI] [PDF]
  • DOMINICO, SIMONE; ALMEIDA, EDUARDO C.; ALVES, MARCO A. Z.; MEIRA, JORGE A. Performance Analysis of Array Database Systems in Non-Uniform Memory Architecture In: 29th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP), 2021, Valladolid, Spain.[DOI] [PDF]

2020

  • Master Dissertation – Aline Santana Cordeiro – UFPR – “Porting machine learning algorithms to vector-in-memory architecture”, 2020 [URI] [PDF]
  • BONA, LUIS C. E. ; ELIAS, ALESSANDRO ; ZIVIANI, ANDRE P. ; NOU, RAMON ; CORTES, TONI ; ALVES, MARCO A. Z. . Freezing time emulating new and faster devices with virtual machines. In: CCF Transactions on High Performance Computing (CCF-THPC), 2020, v. 1, p. 1-13. (Journal) [DOI] [PDF]
  • BOTACIN, MARCUS ; ZANATA, MARCO ; GRÉGIO, ANDRÉ . The self modifying code (SMC)-aware processor (SAP): a security look on architectural impact and support. In: Journal of Computer Virology and Hacking Techniques (JCVHT), 2020, v. 1, p. 1-12. (Journal) [DOI] [PDF]
  • SOKULSKI, RODRIGO M. ; CARRENO, EMMANUELL D. ; ALVES, MARCO A. Z.. Evaluating Cache Line Behavior Predictors for Energy Efficient Processors. In: Communications in Computer and Information Science (CCIS), 2020, v. , p. 185-197. (Journal) [DOI] [PDF]
  • KEPE, TIAGO R.; ALMEIDA, EDUARDO C.; ALVES, MARCO A. Z.. Database Processing-in-Memory. In: International Conference on Very Large Data Bases (VLDB), 2020, Tokyo – Japan. [DOI] [PDF]
  • BOTACIN, MARCUS; GRÉGIO, ANDRÉ; ALVES, MARCO A. Z. Near-Memory & In-Memory Detection of Fileless Malware In: The International Symposium on Memory Systems (MEMSYS), 2020. [DOI] [PDF]

2019

  • PhD. Thesis – Tiago Rodrigo Kepe – UFPR – “The design and implementation of query execution in modern processing-in-memory hardware”, 2019 [URI] [PDF]
  • PhD. Thesis – Paulo Cesar Santos – UFRGS – “Improving efficiency of general purpose computer systems by adopting processing-in-memory architecture”, 2019 [URI] [PDF]
  • Master Dissertation – Flaviene Scheidt De Cristo – UFPR – “Vivid Cuckoo hash: fast cuckoo table building in SIMD”, 2019 [URI] [PDF]
  • Master Dissertation – Ricardo Köhler – UFPR – “Aceleração de cache misses prováveis através de requisições paralelas”, 2019 [URI] [PDF]
  • RIGHI, RODRIGO R. ; COSTA, C. ; FACCO, V. ; FONTANA, I. ; PILLON, M. ; ALVES, MARCO A. Z. . Towards providing middleware-level proactive resource reorganisation for elastic HPC applications in the cloud. In: International Journal of Grid and Utility Computing (IJGUC), 2019, v. 10, p. 76. (Journal) [DOI] [PDF]
  • SANTOS, PAULO C. ; BECK FILHO, ANTONIO C. S. ; AHMED, H. ; LIMA, JOÃO P. C. ; CARRO, LUIGI ; ALVES, MARCO A. Z. ; MOURA, RAFAEL F. . A Technologically Agnostic Framework for Cyber-Physical and IoT Processing-in-Memory-based Systems Simulation. In: Microprocessors and Microsystems (MICPRO), 2019, v. 69, p. 101-111. (Journal) [DOI] [PDF]
  • PIRES, IVAN L. P. ; ALBINI, LUIZ C. P. ; ALVES, MARCO A. Z. . Trace-driven and processing time extensions for Noxim simulator. In: Design Automation for Embedded Systems (DAES), 2019, v. 1, p. 1. (Journal) [DOI] [PDF]
  • KEPE, TIAGO R. ; ALMEIDA, EDUARDO C. ; ALVES, MARCO A. Z. ; MEIRA, JORGE A. . Database Processing-in-Memory: A Vision. In: Database and Expert Systems Applications (DEXA) – Lecture Notes in Computer Science – Springer. 30ed. 2019, p. 418-428. [DOI] [PDF]
  • DE MOURA, RAFAEL F. ; SANTOS, PAULO C. ; DE LIMA, JOÃO P. C. ; ALVES, MARCO A. Z. ; BECK, ANTONIO C. S. ; CARRO, LUIGI . Skipping CNN Convolutions Through Efficient Memoization. In: 19th Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2019, v. , p. 65-76.[DOI] [PDF]
  • LIMA, JOÃO P. C. ; SANTOS, PAULO C. ; MOURA, RAFAEL F. ; ALVES, MARCO A. Z. ; BECK FILHO, ANTONIO C. S. ; CARRO, LUIGI . Exploiting reconfigurable vector processing for energy-efficient computation in 3D-stacked memories. In: 15th International Symposium on Applied Reconfigurable Computing (ARC), 2019, Darmstadt – Germany.[DOI] [PDF]
  • AHMED, HAMEEZA ; SANTOS, PAULO C. ; LIMA, JOÃO P. C. ; MOURA, RAFAEL F. ; ALVES, MARCO A. Z.; BECK, ANTONIO C. S. ; CARRO, LUIGI . A Compiler for Automatic Selection of Suitable Processing-in-Memory Instructions. In: 22nd Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019, Florence – Italy. p. 564.[DOI] [PDF]
  • SANTOS, PAULO C. ; LIMA, JOÃO P. C. ; MOURA, RAFAEL F. ; ALVES, MARCO A. Z. ; BECK FILHO, ANTONIO C. S. ; CARRO, LUIGI . Solving Datapath Issues on Near-Data Accelerators. In: 6th International Embedded Systems Symposium (IESS), 2019, Friedrichshafen – Germany. [PDF]
  • BOTACIN, MARCUS; GALANTE, LUCAS; CESCHIN, FABRICIO; SANTOS, PAULO C.; CARRO, LUIGI; DE GEUS, PAULO; GREGIO, ANDRE; ALVES, MARCO A. Z.. The AV says: Your Hardware Definitions Were Updated! In: 2019 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2019, York. [DOI] [PDF]
  • KEPE, TIAGO R. ; ALMEIDA, EDUARDO C. ; ALVES, MARCO A. Z. . Artigo Visão: Processamento de Banco de Dados em Memória. In: 34th Brazilian Symposium on Databases (SBBD), 2019, Fortaleza – Brazil.[DOI] [PDF]
  • CRISTO, F. S. ; ALMEIDA, EDUARDO C. ; ALVES, MARCO A. Z. . ViViD Cuckoo Hash: Fast Cuckoo Table Building in SIMD. In: 20th Simpósio em Sistemas Computacionais de Alto Desempenho (WSCAD), 2019, Campo Grande – Brazil.[DOI] [PDF]
  • KOHLER, RICARDO ; ALVES, MARCO A. Z. . Acelerando requisições de prováveis cache misses com requisições em paralelo cache/DRAM. In: 9th Brazilian Symposium on Computing Systems Engineering (SBESC), 2019, Natal.[DOI] [PDF]
  • CARRENO, EMMANUELL D. ; ALVES, MARCO A. Z. ; DIENER, MATTHIAS ; ROLOFF, EDUARDO ; NAVAUX, PHILIPPE A. O. . Multi-phased Task Placement of HPC Applications in the Cloud. In: 18th International Symposium on Parallel and Distributed Computing (ISPDC), 2019, Amsterdam – The Netherlands.  p.103.[DOI] [PDF]

2018

  • PhD. Thesis – Ivan Luiz Pedroso Pires – UFPR – “ENoC: Rede-em-Chip Expansível”,  2018 [URI] [PDF]
  • PIRES, IVAN L. P.; ALVES, MARCO A. Z.; ALBINI, LUIZ C. P.. Expansible Network-on-Chip Architecture. In: Advances in Electrical and Computer Engineering (AECE), 2018, v. 18, p. 61-68. (Journal) [DOI] [PDF]
  • DOMINICO, SIMONE; ALMEIDA, EDUARDO C.; MEIRA, JORGE A.; ALVES, MARCO A. Z. An Elastic Multi-Core Allocation Mechanism for Database Systems In: 34th International Conference on Data Engineering (ICDE), 2018, Paris – France, p.473.[DOI] [PDF]
  • BONA, L. C. E.; ELIAS, A.; ZIVIANI, A. P.; CORTES, T.; NOU, RAMON; ALVES, MARCO A. Z.; Freezing Time: A New Approach for Emulating Fast Storage Devices Using VM. In: 26th International Symposium on the Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), 2018, Milwaukee – USA.[DOI] [PDF]
  • TOME, DIEGO G.; KEPE, TIAGO R.; ALVES, MARCO A. Z.; ALMEIDA, E. C.. Near-Data Filters: Taking Another Brick from the Memory Wall. In: 9th International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures (ADMS/VLDB), 2018, Rio De Janeiro – Brazil. [PDF]
  • SANTOS, PAULO C.; OLIVEIRA, GERALDO F.; LIMA, JOÃO P.; ALVES, MARCO A. Z.; CARRO, LUIGI; BECK, ANTONIO C. S. . Processing in 3D memories to speed up operations on complex data structures. In: 21st Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Dresden – Germany. p. 897. [DOI] [PDF]
  • TOME, DIEGO G.; SANTOS, PAULO C.; CARRO, LUIGI; ALMEIDA, EDUARDO C.; ALVES, MARCO A. Z.. HIPE: HMC instruction predication extension applied on database processing. In: 21st Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Dresden – Germany. p. 261.[DOI] [PDF]
  • DE LIMA, JOÃO P. C.; SANTOS, PAULO C.; ALVES, MARCO A. Z.; BECK, ANTONIO C. S.; CARRO, LUIGI. Design space exploration for PIM architectures in 3D-stacked memories. In: 15th International Conference on Computing Frontiers (CF). 2018, Ischia – Italy. p. 113.[DOI] [PDF]

2017

  • Master Dissertation – Diego Gomes Tomé – UFPR –
    “A near-data select scan operator for database systems”, 2017 [URI] [PDF]
  • SANTOS, PAULO C.; OLIVEIRA, GERALDO F.; TOME, DIEGO G.; ALVES, MARCO A. Z.; ALMEIDA, EDUARDO C.; CARRO, LUIGI. Operand size reconfiguration for big data processing in memory. In: 20th Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, Lausanne – Switzerland. p. 710.[DOI] [PDF]
  • OLIVEIRA JUNIOR, GERALDO F.; SANTOS, PAULO C.; ALVES, MARCO A. Z.; CARRO, LUIGI. NIM: an HMC-based Machine for Neuron Computation. In: 13th International Symposium on Applied Reconfigurable Computing (ARC), 2017, Delft – The Netherlands.[DOI] [PDF]
  • DIENER, MATTHIAS ; CRUZ, EDUARDO H. M. ; ALVES, MARCO A. Z. ; BORIN, EDSON ; NAVAUX, PHILIPPE O. A. . Optimizing memory affinity with a hybrid compiler/OS approach. In: 17th Computing Frontiers (CF), 2017, Siena – Italy. p. 221. [DOI] [PDF]
  • OLIVEIRA JUNIOR, GERALDO F.; SANTOS, PAULO C.; ALVES, MARCO A. Z.; CARRO, LUIGI. A generic processing in memory cycle accurate simulator under hybrid memory cube architecture. In: 17th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2017, Pythagorion – Greece. p. 54.[DOI] [PDF]
  • PIRES, IVAN L. P. ; ALVES, MARCO A. Z. ; ALBINI, LUIZ C. P. . Trace-Driven Extension for Noxim Simulator. In: 7th Brazilian Symposium on Computing Systems Engineering (SBESC), 2017, Curitiba – Brazil. p. 102. [PDF]
  • CORDEIRO, ALINE S.; ALVES, MARCO A. Z. . Geração de traços de simulação para instruções de processamento em memória. In: 7th Brazilian Symposium on Computing Systems Engineering (SBESC), 2017, Curitiba – Brazil. [PDF]
  • CORDEIRO, ALINE S.; KEPE, TIAGO R.; TOME, DIEGO G.; ALMEIDA, EDUARDO C.; ALVES, MARCO A. Z..Intrinsics-HMC: An Automatic Trace Generator for Simulations of Processing-In-Memory Instructions. In: 18th Simpósio em Sistemas Computacionais de Alto Desempenho (WSCAD), 2017, Campinas – Brazil.[DOI] [PDF]

2016

  • MOREIRA, FRANCIS B. ; ALVES, MARCO A. Z. ; DIENER, MATTHIAS ; NAVAUX, PHILIPPE O. A. ; KOREN, ISRAEL . A dynamic block-level execution profiler. In: Parallel Computing (PARCO), 2016, v. 54, p. 15-28. (Journal) [PDF]
  • DIENER, MATTHIAS ; CRUZ, EDUARDO H. M. ; ALVES, MARCO A. Z. ; NAVAUX, PHILIPPE O. A. ; KOREN, ISRAEL . Affinity-Based Thread and Data Mapping in Shared Memory Systems. In: ACM Computing Surveys (CS), 2016, v. 49, p. 1-38. (Journal) [PDF]
  • ALVES, MARCO A. Z.; DIENER, MATTHIAS; C. SANTOS, PAULO; CARRO, LUIGI. Large Vector Extensions Inside the HMC. In: 19th Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, Dresden – Germany. p. 1249-1254. [PDF]
  • SANTOS, PAULO C. ; ALVES, MARCO A. Z. ; DIENER, MATTHIAS ; CARRO, LUIGI ; NAVAUX, PHILIPPE O. A. . Exploring Cache Size and Core Count Tradeoffs in Systems with Reduced Memory Access Latency. In: 24th Euromicro International Conference on Parallel, Distributed, and Network Based Processing (PDP), Heraklion – Greece, 2016. p. 388-392. [PDF]
  • DIENER, MATTHIAS ; CRUZ, EDUARDO H. M. ; ALVES, MARCO A. Z. ; NAVAUX, PHILIPPE O. A. . Communication in Shared Memory: Concepts, Definitions, and Efficient Detection. In: 24th Euromicro International Conference on Parallel, Distributed, and Network Based Processing (PDP), Heraklion – Greece. 2016, p. 151. [PDF]

2015

  • CRUZ, EDUARDO H. M. ; DIENER, MATTHIAS ; ALVES, MARCO A. Z. ; PILLA, LAERCIO L. ; NAVAUX, PHILIPPE O.A. . LAPT: A Locality-Aware Page Table for Thread and Data Mapping. In: Parallel Computing (PARCO), 2015, v. 54, p. 59-71. (Journal) [PDF]
  • ALVES, MARCO A. Z.; SANTOS, PAULO C.; DIENER, MATTHIAS; CARRO, LUIGI. Reconfigurable Vector Extensions inside the DRAM. In: 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2015, Bremen – Germany. [PDF]
  • ALVES, MARCO A. Z.; VILLAVIEJA, C.; DIENER, MATTHIAS; MOREIRA, FRANCIS B.; NAVAUX, P. O. A. . SiNUCA: A Validated Microarchitecture Simulator. In: 17th International Conference On High Performance Computing And Communications (HPCC), 2015, New York – USA. [PDF]
  • ALVES, MARCO A. Z.; SANTOS, PAULO C.; MOREIRA, FRANCIS B.; DIENER, MATTHIAS; CARRO, LUIGI. Saving memory movements through vector processing in the DRAM. In: 21st International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2015, Amsterdam – The Netherlands. [PDF]
  • ALVES, MARCO A. Z.; SANTOS, PAULO C.; DIENER, MATTHIAS; CARRO, LUIGI. Opportunities and Challenges of Performing Vector Operations inside the DRAM.  In: 1st International Symposium on Memory Systems (MEMSYS), 2015. [PDF]
  • SANTOS, PAULO C.; ALVES, MARCO A. Z.; CARRO, LUIGI . HMC and DDR performance trade-offs. In: 2nd International Embedded Systems Symposium (IESS), 2015. [PDF]

2014

  • PhD. Thesis – Marco Antonio Zanata Alves – UFRGS – 
    “Increasing Energy Efficiency of Processor Caches via Line Usage Predictors”, 2014 URI:http://hdl.handle.net/10183/96062  [PDF]
  • CRUZ, EDUARDO H.M. ; DIENER, MATTHIAS ; ALVES, MARCO A.Z. ; PILLA, LAERCIO L. ; NAVAUX, PHILIPPE O.A. . Optimizing Memory Locality Using a Locality-Aware Page Table. In: 26th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2014, Paris – France. p. 198. [PDF]
  • MOREIRA, FRANCIS B. ; ALVES, MARCO A. Z. ; DIENER, MATTHIAS ; NAVAUX, P. O. A. ; KOREN, I. . Profiling and Reducing Micro-Architecture Bottlenecks at the Hardware Level. In: 26th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2014, Paris – France. [PDF]
  • SOUZA, M. A. ; ALVES, MARCO A. Z. ; FREITAS, H. C. ; NAVAUX, P. O. A. . Avaliação do Consumo Energético em Arquiteturas Multi-Core com Memória Cache Compartilhada. In: 13th Workshop em Desempenho de Sistemas Computacionais e de Comunicação (WPerformance), 2014, Brasilia – Brazil.  p. 1812-1824. [PDF]

2013

  • CRUZ, EDUARDO H. M. ; DIENER, MATTHIAS ; ALVES, MARCO A. Z. ; NAVAUX, P. O. A. . Dynamic thread mapping of shared memory applications by exploiting cache coherence protocols. In: Journal of Parallel and Distributed Computing (JPDC) , 2013, v. 73, p. 1-14. (Journal) [PDF]
  • MOREIRA, FRANCIS B. ; ALVES, MARCO A. Z.; DIENER, MATTHIAS ; NAVAUX, P. O. A. . Influência das Características de Processadores e Aplicações no Nível de Blocos Básicos. In: 14th Symposium on Computing Systems (WSCAD-SCC), 2013, Ipojuca – Brazil. p. 84-91. [PDF]
  • ALVES, MARCO A. Z.; VILLAVIEJA, C. ; DIENER, MATTHIAS ; NAVAUX, P. O. A. . Energy Efficient Last Level Caches via Last Read/Write Prediction. In: 25th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2013, Ipojuca – Brazil. p. 73-80. [PDF]

2012

  • CRUZ, EDUARDO H. M. ; ALVES, MARCO A. Z. ; RIBEIRO, C. P. ; CARISSIMI, A. S. ; NAVAUX, P. O. A. ; MEHAUT, J. . Memory-aware Thread and Data Mapping for Hierarchical Multi-core Platforms. In: International Journal of Networking and Computing (IJNC), 2012, v. 2, p. 97-116. (Journal) [PDF]
  • ALVES, MARCO A. Z.; KHUBAIB; EBRAHIMI, EIMAN ; NARASIMAN, VEYNU T. ; VILLAVIEJA, CARLOS ; NAVAUX, PHILIPPE O. A. ; PATT, YALE N. . Energy Savings via Dead Sub-Block Prediction. In: 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2012, New York – USA, p. 51. [PDF]

2011

  • ALVES, MARCO A. Z.; FREITAS, H. C. ; NAVAUX, P. O. A. . HIGH LATENCY AND CONTENTION ON SHARED L2-CACHE FOR MANY-CORE ARCHITECTURES. In: Parallel Processing Letters (PPL), v. 21, p. 85, 2011. (Journal) [PDF]
  • RUTZIG, M. B. ; BECK FILHO, ANTONIO C. S. ; MADRUGA, F. L. ; ALVES, MARCO A. Z. ; FREITAS, H. C. ; MAILLARD, N. ; NAVAUX, P. O. A. ; CARRO, LUIGI . Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment. In: International Journal of Reconfigurable Computing (IJRC), 2011, p. 1-13. (Journal) [PDF]
  • CRUZ, EDUARDO H. M. ; ALVES, MARCO A. Z.; CARISSIMI, A. S. ; NAVAUX, P. O. A. ; RIBEIRO, C. P. ; MEHAUT, JEAN-FRANCOIS . Using Memory Access Traces to Map Threads and Data on Hierarchical Multi-core Platforms. In: 25th International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), 2011, Anchorage – USA. [PDF]
  • MOREIRA, FRANCIS B. ; CRUZ, EDUARDO H. M. ; ALVES, MARCO A. Z. ; NAVAUX, PHILIPPE O. A. . Scratchpad Memories for Parallel Applications in Multi-core Architectures, In: 12th Symposium on Computing Systems (WSCAD-SCC), 2011, Vitória – Brazil. [PDF]

2010

  • FREITAS, HENRIQUE C. ; SCHNORR, LUCAS M. ; ALVES, MARCO A. Z. ; NAVAUX, PHILIPPE O. A. . Impact of Parallel Workloads on NoC Architecture Design. In: 18th Euromicro International Conference on Parallel, Distributed and NetworkBased Processing (PDP), 2010, Pisa – Italy. p. 551-555. [PDF]
  • DIENER, MATTHIAS ; MADRUGA, F. L. ; RODRIGUES, E. R. ; ALVES, MARCO A. Z. ; SCHNEIDER, J. ; NAVAUX, PHILIPPE O. A. ; HEIß, H. . Evaluating Thread Placement Based on Memory Access Patterns for Shared Cache Multi-core Processors. In: International Symposium on Advanced on High Performance Computing and Communications (HPCC), 2010, Melbourne – Australia. p. 491-496. [PDF]
  • RUTZIG, MATEUS B ; MADRUGA, FELIPE ; ALVES, MARCO A. Z. ; COTA, HENRIQUE ; BECK, ANTONIO C. S. ; MAILLARD, NICOLAS ; NAVAUX, PHILIPPE O. A.; CARRO, LUIGI . TLP and ILP exploitation through a reconfigurable multiprocessor system. In: 24th International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum / Reconfigurable Architectures Workshop (IPDPSW/RAW), 2010, Atlanta – USA, p. 1-8. [PDF]
  • MOR, STEFANO D. K. ; ALVES, MARCO A. Z. ; LIMA, JOÃO V. F. ; MAILLARD, NICOLAS ; NAVAUX, PHILIPPE O. A. . Eficiência Energética em Computação de Alto Desempenho: Uma Abordagem em Arquitetura e Programação para Green Computing. In: 37th Seminário Integrado de Software e Hardware (SEMISH), 2010, Belo Horizonte – Brazil. [PDF]
  • ALVES, MARCO A. Z.; NAVAUX, PHILIPPE O. A. . Intermediary Cache Memory Level for Data Exchange and Interactions of Parallel Scientific Applications. In: Conferencia Latino Americana de Computación de Alto Rendimiento (CLCAR), 2010, Gramado – Brazil. p. 107-116. [PDF] 
  • ALVES, MARCO A. Z.; CERA, MÁRCIA C. ; LIMA, JOÃO V. F. ; MAILLARD, NICOLAS ; NAVAUX, PHILIPPE O. A. . Enhancing Energy Efficiency using Efficient Parallel Programming Techniques. In: Conferencia Latino Americana de Computación de Alto Rendimiento (CLCAR), 2010, Gramado – Brazil, p. 117-124. [PDF]
  • CRUZ, EDUARDO H. M. ; ALVES, MARCO A. Z. ; NAVAUX, PHILIPPE O. A. . Process Mapping Based on Memory Access Traces, In: 11th Symposium on Computing Systems (WSCAD-SCC), 2010. p. 72-79. [PDF]

2009

  • ALVES, MARCO A. Z.; FREITAS, HENRIQUE C. ; NAVAUX, PHILIPPE O. A. . Investigation of Shared L2 Cache on Many-Core Processors. In: 1st Workshop on Many-Cores (WMC-ARCS), 2009, Delft – The Netherlands.  p. 21-30. [PDF]
  • FREITAS, HENRIQUE C. ; MADRUGA, FELIPE L. ; ALVES, MARCO A. Z. ; NAVAUX, PHILIPPE O. A. . Design of Interleaved Multithreading for Network Processors on Chip. In: 22nd International Symposium on Systems and Circuits (ISCAS), 2009, Taipei – China. p. 2213-2216. [PDF]
  • FREITAS, HENRIQUE C. ; ALVES, MARCO A. Z. ; SCHNORR, LUCAS M. ; NAVAUX, PHILIPPE O. A. . Performance Evaluation of NoC Architectures for Parallel Workloads. In: 3rd International Symposium on Networks-on-Chip (NOCS), 2009, San Diego – USA, p. 87-87. [PDF]

2008

  • FREITAS, HENRIQUE C. ; ALVES, MARCO A. Z. ; MAILLARD, NICOLAS ; NAVAUX, PHILIPPE O. A. . Ensino de Arquiteturas de Processadores Multi-Core Através de um Sistema de Simulação Completo e da Experiência de um Projeto de Pesquisa. In: 2nd Workshop sobre Educação em Arquitetura de Computadores (WEAC), 2008, p. 1-8. [PDF]

2007

  • ALVES, MARCO A. Z.; FREITAS, HENRIQUE C. ; WAGNER, FLÁVIO R. ; NAVAUX, PHILIPPE O. A. . Influência do Compartilhamento de Cache L2 em um Chip Multiprocessado sob Cargas de Trabalho com Conjuntos de Dados Contíguos e Não Contíguos. In: 8th Workshop em Sistemas Computacionais de Alto Desempenho (WSCAD), 2007, Gramado – Brazil. [PDF]

2006

  • ALVES, MARCO A. Z.; DOESCHER, ERWIN . APPROXIMATIONS OF THE POISSON EQUATION USING NUMERICAL METHODS: PERFORMANCE AND RESULTS. In: 29th Congresso Nacional de Matemática Aplicada Computacional (CNMAC), 2006, Campinas – Brazil. [PDF]